# Logic Gates

! important ! If you know about logic gates, jump to the parts explaining how we make the gates out of MOSFETs.

Logic gates are the fundamental building blocks that form the basis of all digital circuits. These gates perform logical operations on binary inputs (0 and 1) and produce binary outputs, enabling us to process and manipulate information in a digital form.

In this blog post, we will explore four essential logic gates: NOT, NAND, NOR, and XOR. We'll also discuss their importance as universal gates and demonstrate how to construct AND, OR, and XOR gates using them.

Additionally, we'll go into into how these gates can be implemented using MOSFET transistors, along with pull-up resistors, for practical digital circuit design. This chapter is necessary to understand every aspect of the computer.

## Basic terms

Logic gates/functions are objects that take one or more logic inputs and give one output. The inputs/output are logic because they can only be in two values, logic 1 and logic 0.

We can fully specify logic functions with truth tables. They are just tables that list all possible inputs and their respective outputs. We can do that because there are finite many of them.

## Ground rules

We will construct small functions that take one or several logic inputs and create a logic output. Logic input/output is considered "1" if it is pulled up to the working voltage. It is considered "0" if it is connected to ground. This has some nice properties:

- connecting two outputs is safe. If we connect 2 logic 0s or 1s nothing happens. If we connect 1 and 0 the output becomes 0.
- we get a "free" operation. Connecting 1 and 0 gives 0. We will use this later

## The NOT Gate

The simplest logic gate is the NOT gate, also known as an inverter. It takes a single input and produces the opposite (complementary) output. The truth table for a NOT gate is as follows:

Input (A) | Output (Q) |
---|---|

0 | 1 |

1 | 0 |

### Implementing a NOT Gate with MOSFETs

A NOT gate can be created using a single N-channel MOSFET. Here's the design:

In this circuit:

- A single N-channel MOSFET is used.
- Input signal A is applied to the gate of the MOSFET.
- The output is taken from the drain of the MOSFET.

**Reasoning:**

- When input A is logic '1', the MOSFET turns on, connecting the output to ground (logic '0').
- When input A is logic '0', the MOSFET remains off, allowing a pull-up resistor to pull the output to logic '1'.

## The NAND Gate

The NAND gate is short for "NOT-AND" and is a universal gate, meaning that it can be used to construct any other logic gate. The NAND gate performs the opposite of the AND operation. Its truth table is as follows:

Input A | Input B | Output Q |
---|---|---|

0 | 0 | 1 |

0 | 1 | 1 |

1 | 0 | 1 |

1 | 1 | 0 |

### Implementing a NAND Gate with MOSFETs

A NAND gate can be constructed using N-channel MOSFETs. Here's how it works:

In this circuit:

- Two N-channel MOSFETs are connected in series.
- Input signals A and B are applied to the gates of the MOSFETs.
- The drain of the first MOSFET is connected to the source of the second MOSFET.
- The output is taken from the drain of the second MOSFET.

**Reasoning:**

- When both inputs A and B are logic '1' (high voltage), both MOSFETs turn on, creating a low voltage at the output due to the voltage drop across the first MOSFET.
- In all other cases, at least one of the MOSFETs is off, resulting in a high voltage at the output.

## The NOR Gate

The NOR gate, short for "NOT-OR," is another universal gate that produces the opposite of the OR operation. Its truth table is as follows:

Input A | Input B | Output Q |
---|---|---|

0 | 0 | 1 |

0 | 1 | 0 |

1 | 0 | 0 |

1 | 1 | 0 |

### Implementing a NOR Gate with MOSFETs

A NOR gate can be designed using MOSFETs and a pull-up resistor. Here's how it's done:

#### Circuit Diagram:

In this circuit:

- Two MOSFETs are connected in parallel.
- Input signals A and B are applied to the gates of the MOSFETs.
- The source of the MOSFETs is connected to the power supply voltage (VDD).
- A pull-up resistor is connected to the output.
- The output is taken from the common drain node.

**Reasoning:**

- When both inputs A and B are logic '0', both MOSFETs turn on, connecting the output to ground (logic '0').
- In all other cases, at least one of the MOSFETs is off, allowing the pull-up resistor to pull the output to VDD (logic '1').

## The AND Gate

The AND gate is a fundamental logic gate that produces a high (1) output only when both of its inputs are high (1). It can be constructed using NAND and NOT gates. Here's its truth table:

Input A | Input B | Output Q |
---|---|---|

0 | 0 | 0 |

0 | 1 | 0 |

1 | 0 | 0 |

1 | 1 | 1 |

### Implementing an AND Gate with NAND and NOT Gates

**Reasoning:**

- The NAND gate produces a low (0) output only when both inputs A and B are high (1).
- The NOT gate inverts the output of the NAND gate, making it high (1) when the NAND gate's output is low (0), which corresponds to an AND gate's behavior.

## The OR Gate

The OR gate is another fundamental logic gate that produces a high (1) output when at least one of its inputs is high (1). It can be constructed using NOR and NOT gates. Here's its truth table:

Input A | Input B | Output Q |
---|---|---|

0 | 0 | 0 |

0 | 1 | 1 |

1 | 0 | 1 |

1 | 1 | 1 |

### Implementing an OR Gate with NOR and NOT Gates

**Reasoning:**

- The NOR gate produces a high (1) output only when both inputs A and B are low (0).
- The NOT gate inverts the output of the NOR gate, making it high (1) when the NOR gate's output is low (0), which corresponds to an OR gate's behavior.

## Logic gate symbols

## The XOR Gate

The XOR gate, which stands for "Exclusive OR," is a fundamental logic gate that takes two binary inputs (A and B) and produces an output that

is true (1) if and only if exactly one of the inputs is true (1). Its truth table is as follows:

Input A | Input B | Output Q |
---|---|---|

0 | 0 | 0 |

0 | 1 | 1 |

1 | 0 | 1 |

1 | 1 | 0 |

## Implementing an XOR Gate

The XOR gate means exclusive OR which means that only A or only B has to be 1. The other must be 0. We can write that down as:

```
XOR(A, B) = OR( AND(NOT A, B), AND(A, NOT B) )
```

We will use the following identity: ```
NOT OR(A, B) = AND(NOT A, NOT B)
OR(A, B) = NAND(NOT A, NOT B)
```

Let's continue: ```
XOR(A, B) = OR( AND(NOT A, B), AND(A, NOT B) )
// apply the identity
= NAND(NOT AND(NOT A, B), NOT AND(A, NOT B) )
// merge
= NAND( NAND(NOT A, B), NAND(A, NOT B) )
// we will explain in the next step
= NAND( NAND( NAND(A, B), B), NAND(A, NAND(A, B)))
```

The result that we came to is really nice, we only need 4 nand gates or 8 transistors. We can do that by reusing NAND(A, B). Now we need to just explain this:

```
NAND(NOT A, B) = NAND( NAND(A, B), B)
```

This intuitivly makes sense. If B is 0 both sides are 1. If B is 1 it just dissapears because we are doing NAND. We have:

```
NAND(NOT A, 1) = NAND( NAND(A, 1), 1)
NOT NOT A = NOT NOT A
```

So this is the final circuit for XOR gate: